74v1g07 single buffer (open drain) preliminary data ? october 1999 n high speed: t pd = 6.1 ns (typ.) at v cc =5v n low power dissipation: i cc =1 m a (max.) at t a =25 o c n high noise immunity: v nih =v nil =28%v cc (min.) n power down protection on input n operating voltage range: v cc (opr) = 2v to 5.5v n improved latch-up immunity description the 74v1g07 is an advanced high-speed cmos single buffer (open drain) fabricated with sub-micron silicon gate and double-layer metal wiring c 2 mos technology. the internal circuit is composed of 2 stages including buffer output, which provide high noise immunity and stable output. power down protection is provided on input and 0 to 7v can be accepted on input with no regard to the supply voltage. this device can be used to interface 5v to 3v. pin connection and iec logic symbols order code: 74V1G07S 74v1g07c s (sot23-5l) c (sc-70) 1/7
input equivalent circuit truth table ay ll hz z = high impedance pin description pin no symbol name and function 1 n.c. not connected 2 1a data input 4 1y data output 3 gnd ground (0v) 5v cc positive supply voltage absolute maximum ratings symbol parameter value unit v cc supply voltage -0.5 to +7.0 v v i dc input voltage -0.5 to +7.0 v v o dc output voltage -0.5 to v cc + 0.5 v i ik dc input diode current - 20 ma i ok dc output diode current 20 ma i o dc output current 25 ma i cc or i gnd dc v cc or ground current 50 ma t stg storage temperature -65 to +150 o c t l lead temperature (10 sec) 260 o c absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these condition is not implied. recommended operating conditions symbol parameter value unit v cc supply voltage 2.0 to 5.5 v v i input voltage 0 to 5.5 v v o output voltage 0 to v cc v t op operating temperature -40 to +85 o c dt/dv input rise and fall time (see note 1) (v cc =3.3 0.3v) (v cc =5.0 0.5v) 0 to 100 0to20 ns/v ns/v 1) v in from 30% to70%of v cc 74v1g07 2/7
dc specifications symbol parameter test conditions value unit v cc (v) t a =25 o c -40 to 85 o c min. typ. max. min. max. v ih high level input voltage 2.0 1.5 1.5 v 3.0 to 5.5 0.7v cc 0.7v cc v il low level input voltage 2.0 0.5 0.5 v 3.0 to 5.5 0.3v cc 0.3v cc v ol low level output voltage 2.0 i o =50 m a 0.0 0.1 0.1 v 3.0 i o =50 m a 0.0 0.1 0.1 4.5 i o =50 m a 0.0 0.1 0.1 3.0 i o =4 ma 0.36 0.44 4.5 i o =8 ma 0.36 0.44 i oz high impedance output leakage current 5.5 v i =v ih or v il v o =v cc or gnd 0.25 2.5 m a i i input leakage current 0 to 5.5 v i = 5.5v or gnd 0.1 1.0 m a i cc quiescent supply current 5.5 v i =v cc or gnd 1 10 m a capacitive characteristics symbol parameter test conditions value unit t a =25 o c -40 to 85 o c min. typ. max. min. max. c in input capacitance 4 10 10 pf c pd power dissipation capacitance (note 1) 11 pf 1) c pd isdefined as the value of the ic'sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (refert o test circuit).average operating current can be obtained by the following equation. i cc (opr) = c pd ? v cc ? f in +i cc ac electrical characteristics (input t r =t f =3 ns) symbol parameter test condition value unit v cc (v) c l (pf) t a =25 o c -40 to 85 o c min. typ. max. min. max. t plh t phl propagation delay time 3.3 (*) 15 7.0 9.7 1.0 11.5 ns 3.3 (*) 50 9.5 13.2 1.0 15.0 5.0 (**) 15 4.6 6.8 1.0 8.0 5.0 (**) 50 6.1 8.8 1.0 10.0 (*) voltage range is 3.3v 0.3v (**) voltage range is 5v 0.5v 74v1g07 3/7
test circuit waveform: propagation delays (f=1mhz; 50% duty cycle) c l = 15/50 pf or equivalent (includes jig and probe capacitance) r l =r 1 =1k w or equivalent r t =z out of pulse generator (typically 50 w ) 74v1g07 4/7
dim. mm mils min. typ. max. min. typ. max. a 0.90 1.45 35.4 57.1 a1 0.00 0.15 0.0 5.9 a2 0.90 1.30 35.4 51.2 b 0.35 0.50 13.7 19.7 c 0.09 0.20 3.5 7.8 d 2.80 3.00 110.2 118.1 e 2.60 3.00 102.3 118.1 e1 1.50 1.75 59.0 68.8 l 0.35 0.55 13.7 21.6 e 0.95 37.4 e1 1.9 74.8 sot23-5l mechanical data 74v1g07 5/7
dim. mm mils min. typ. max. min. typ. max. a 0.80 1.10 31.5 43.3 a1 0.00 0.10 0.0 3.9 a2 0.80 1.00 31.5 39.4 b 0.15 0.30 5.9 11.8 c 0.10 0.18 3.9 7.1 d 1.80 2.20 70.9 86.6 e 1.80 2.40 70.9 94.5 e1 1.15 1.35 45.3 53.1 l 0.10 0.30 3.9 11.8 e 0.65 25.6 e1 1.3 51.2 sc-70 mechanical data 74v1g07 6/7
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specification mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems withoutexpress written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics ? 1999 stmicroelectronics printed in italy all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www.st.com . 74v1g07 7/7
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